The invention relates to a method of manufacturing a semiconductor device whereby a silicon body is provided at a surface with a programmable element in the form of an anti-fuse comprising a thin silicon oxide layer situated between a surface zone in the semiconductor body and an electrode applied on the silicon oxide layer, the anti-fuse being brought from a first, non-conducting state into a second, conducting state during programming in that a voltage is applied between the electrode and the surface zone. The invention also relates to a semiconductor device manufactured by such a method.
Such a method and a device manufactured by this method are known inter alia from U.S. Pat. No. 4,757,359. The anti-fuse described therein comprises a thin silicon oxide layer with a thickness of between 8 and 11 nm arranged between two electrodes. A Fowler-Nordheim tunnelling current occurs through the oxide when a voltage is applied between the electrodes. A conductive connection between the electrodes is formed at a certain quantity of charge. The element can be programmed in this way and, for example as a memory element, can form a programmable memory (PROM) together with identical elements. A voltage of 10 V is used for programming the known anti-fuse, and preferably 15 V. It is often desirable to use a lower voltage, i.e. lower than 10 V; however, this is impossible because the programming times would become too long given the above thickness of the oxide layer. A further reduction in the thickness of the anti-fuse oxide, whereby said disadvantages could be at least partly eleiminated, has the drawback that it is difficult to manufacture such thin layers in a reproducible manner. In general, the time required for forming an oxide layer of 5 nm is much too short for a standard i.e. process. Moreover, the quality of such extremely thin oxide layers is often found to be poor, in particular owing to the presence of pinholes.